Modular Multilevel Converters With Interleaved Half-Bridge Submodules

Modular multilevel converter (MMC) has a prominent potential to take over the high-power converter market thanks to its exceptional characteristics, including modularity, flexibility to adapt to any voltage level, significant reduction in average switching frequency without compromising remarkable harmonic performance and many other. However, due to structural constraints of the existing submodule arrangements in classical MMCs the power scalability at submodule levels is limited. To address this issue, this PhD thesis reports a novel Modular Multilevel Converter with Interleaved half-bridge Sub-Modules (ISM-MMC). The ISM-MMC exhibits a higher modularity and scalability in terms of current ratings with respect to conventional MMCs, while preserves the typical voltage level adaptiveness. The ISM-MMC brings the known advantages of classical MMC to low/medium-voltage, high-current applications, where classical MMCs are rarely used. A detailed description of operating principle along with the converter’s average model, outer and internal control methods, a hybrid modulation scheme that helps to exploit advantages of the interleaving scheme and converter efficiency analysis are given in this thesis. This dissertation also concerns a current balancing problem that is typical in interleaved converters, while it is very new issue in MMC-based structures. The problem has been rigorously studied and a new control strategy, which relies on interleaved currents estimation, has been proposed in this work. This technique minimizes the number of required current sensors in ISM-MMC, thereby reducing the converter’s cost, weight, and volume. To make operation of such current regulators possible, a new capacitor voltage balancing strategy suitable for both ISM-MMCs and conventional MMCs is developed. Extensive numerical simulations, hardware-in-the-loop, and experimental tests on a scaled-down, single-phase ISM-MMC laboratory prototype are carried out to demonstrate the feasibility of the proposed topology, implemented modulation and control schemes.