Parallel computing architectures and techniques for heterogeneous acceleration of AI algorithms

The field of computer architecture is currently marked by a dual pursuit of high performance and efficiency on the one hand and the demand for general, standardized, and reusable solutions on the other. The rapid growth of artificial intelligence (AI) workloads has significantly influenced computer architecture design from edge to high-performance computing since AI acceleration has become paramount. This thesis addresses the complex and diverse challenges of accelerating AI workloads, highlighting the crucial factors of performance, area, power constraints, and communication bottlenecks. Various strategies and techniques are proposed to navigate this intricate landscape, acknowledging the need for efficient solutions that cater to a wide range of applications. The proposed strategies and techniques open avenues for further research and the development of the next generation of computer architectures.