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Abstract
Epoxy-based molding compounds (EMCs) are widely used in semiconductor packaging because of their mechanical robustness, electrical insulation, and resistance to environmental stress. Although EMCs have been extensively studied using bulk samples or large leadframe distances, the dielectric reliability of thin EMC layers in realistic package environments remains insufficiently understood. As power and high-voltage integrated circuits operate under increasing electric field stress, improved understanding of EMC behavior is required for reliable package design.
This thesis investigates the dielectric behavior and breakdown characteristics of thin EMC layers under high electrical stress. Interdigitated capacitor test structures embedded in standard semiconductor packages are used to study dielectric degradation and breakdown under DC and AC ramp voltage stress. The effects of humidity, frequency, temperature, and thickness are systematically evaluated.
Experimental results show clear differences between DC and AC breakdown behavior, with AC stress generally resulting in lower breakdown strength. Under dry conditions, breakdown strength exhibits a strong dependence on frequency, whereas temperature has only limited influence under both dry and humid conditions. These observations indicate that charge transport and accumulation mechanisms play an important role in breakdown process. Dielectric spectroscopy is employed to investigate field- and frequency-dependent dielectric properties. High electric fields are found to modify dielectric relaxation behavior, consistent with space charge accumulation and interfacial polarization effects.
To further examine breakdown mechanisms, technology computer-aided design (TCAD) simulations are developed to analyze electric field distribution and breakdown initiation in EMC-encapsulated structures. One-, two-, and three-dimensional simulations reveal significant field enhancement at metal edges and corners. Good agreement between experimental and simulation results validates the developed framework and highlights the importance of geometry and space charge effects in determining local field stress.
The combined experimental and simulation results provide insight into EMC dielectric reliability and support improved semiconductor package design for high-voltage automotive and industrial applications.
Abstract
Epoxy-based molding compounds (EMCs) are widely used in semiconductor packaging because of their mechanical robustness, electrical insulation, and resistance to environmental stress. Although EMCs have been extensively studied using bulk samples or large leadframe distances, the dielectric reliability of thin EMC layers in realistic package environments remains insufficiently understood. As power and high-voltage integrated circuits operate under increasing electric field stress, improved understanding of EMC behavior is required for reliable package design.
This thesis investigates the dielectric behavior and breakdown characteristics of thin EMC layers under high electrical stress. Interdigitated capacitor test structures embedded in standard semiconductor packages are used to study dielectric degradation and breakdown under DC and AC ramp voltage stress. The effects of humidity, frequency, temperature, and thickness are systematically evaluated.
Experimental results show clear differences between DC and AC breakdown behavior, with AC stress generally resulting in lower breakdown strength. Under dry conditions, breakdown strength exhibits a strong dependence on frequency, whereas temperature has only limited influence under both dry and humid conditions. These observations indicate that charge transport and accumulation mechanisms play an important role in breakdown process. Dielectric spectroscopy is employed to investigate field- and frequency-dependent dielectric properties. High electric fields are found to modify dielectric relaxation behavior, consistent with space charge accumulation and interfacial polarization effects.
To further examine breakdown mechanisms, technology computer-aided design (TCAD) simulations are developed to analyze electric field distribution and breakdown initiation in EMC-encapsulated structures. One-, two-, and three-dimensional simulations reveal significant field enhancement at metal edges and corners. Good agreement between experimental and simulation results validates the developed framework and highlights the importance of geometry and space charge effects in determining local field stress.
The combined experimental and simulation results provide insight into EMC dielectric reliability and support improved semiconductor package design for high-voltage automotive and industrial applications.
Tipologia del documento
Tesi di dottorato
Autore
Riaz, Muhammad Tanveer
Supervisore
Co-supervisore
Dottorato di ricerca
Ciclo
38
Coordinatore
Settore disciplinare
Settore concorsuale
Parole chiave
Power electronics reliability, High electric fields, Interdigitated capacitor, Epoxy Molding Compound, Dielectric breakdown, frequency dependence
Data di discussione
24 Luglio 2026
URI
Altri metadati
Tipologia del documento
Tesi di dottorato
Autore
Riaz, Muhammad Tanveer
Supervisore
Co-supervisore
Dottorato di ricerca
Ciclo
38
Coordinatore
Settore disciplinare
Settore concorsuale
Parole chiave
Power electronics reliability, High electric fields, Interdigitated capacitor, Epoxy Molding Compound, Dielectric breakdown, frequency dependence
Data di discussione
24 Luglio 2026
URI
Gestione del documento: