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Abstract
Ensuring functional safety in automotive systems requires advanced fault-tolerance solutions for multicore microcontrollers, which are increasingly exposed to faults due to technology scaling and increasing computational demands. This thesis addresses such a problem by analyzing reliability at multiple levels, from the architectural one, to the technological one. At the architectural level, fail-operational techniques are investigated, with particular focus on the Dual Core Lockstep (DCLS) paradigm and its reconfiguration strategy. The solution proposed and discussed in this thesis requires a limited area overhead and a minimal impact on system performance. Moreover, reliability issues of clock monitoring circuits are also analyzed, by means of fault simulations performed on a case study Clock Monitoring Unit (CMU). The analysis highlighted that many faults remain latent and can compromise the proper functionality of the CMU. At the technological level, the study evaluates Fin Field Effect Transistors (FinFET)-based designs, and models and analyzes the combined impact of latent faults and aging effects on circuit delay. The achieved results show that the interaction of these mechanisms can significantly accelerate degradation, putting at risk circuit’s correct operation. Finally, the thesis explores the adoption of emerging non-volatile memories, such as Phase Change Memory (PCM), in hardware accelerators implementing artificial intelligence for automotive applications, with focus on their adoption to memorize the weights of convolutional neural networks (CNNs), and the impact of possible soft errors on their reliability. It has been shown that these errors can lead to a drastic reduction of the CNN’s accuracy. In this context, a mitigation strategy was then developed to neutralize the effect of soft errors, allowing the re-establishment of the fault-free accuracy level. The results demonstrate that combining architectural solutions, robust monitoring units, and advanced device technologies provides a comprehensive approach to enhance fault tolerance in automotive systems.
Abstract
Ensuring functional safety in automotive systems requires advanced fault-tolerance solutions for multicore microcontrollers, which are increasingly exposed to faults due to technology scaling and increasing computational demands. This thesis addresses such a problem by analyzing reliability at multiple levels, from the architectural one, to the technological one. At the architectural level, fail-operational techniques are investigated, with particular focus on the Dual Core Lockstep (DCLS) paradigm and its reconfiguration strategy. The solution proposed and discussed in this thesis requires a limited area overhead and a minimal impact on system performance. Moreover, reliability issues of clock monitoring circuits are also analyzed, by means of fault simulations performed on a case study Clock Monitoring Unit (CMU). The analysis highlighted that many faults remain latent and can compromise the proper functionality of the CMU. At the technological level, the study evaluates Fin Field Effect Transistors (FinFET)-based designs, and models and analyzes the combined impact of latent faults and aging effects on circuit delay. The achieved results show that the interaction of these mechanisms can significantly accelerate degradation, putting at risk circuit’s correct operation. Finally, the thesis explores the adoption of emerging non-volatile memories, such as Phase Change Memory (PCM), in hardware accelerators implementing artificial intelligence for automotive applications, with focus on their adoption to memorize the weights of convolutional neural networks (CNNs), and the impact of possible soft errors on their reliability. It has been shown that these errors can lead to a drastic reduction of the CNN’s accuracy. In this context, a mitigation strategy was then developed to neutralize the effect of soft errors, allowing the re-establishment of the fault-free accuracy level. The results demonstrate that combining architectural solutions, robust monitoring units, and advanced device technologies provides a comprehensive approach to enhance fault tolerance in automotive systems.
Tipologia del documento
Tesi di dottorato
Autore
Naldi, Matteo
Supervisore
Co-supervisore
Dottorato di ricerca
Ciclo
38
Coordinatore
Settore disciplinare
Settore concorsuale
Parole chiave
Functional Safety, Fault Tolerance, Reliability, Automotive
Data di discussione
10 Aprile 2026
URI
Altri metadati
Tipologia del documento
Tesi di dottorato
Autore
Naldi, Matteo
Supervisore
Co-supervisore
Dottorato di ricerca
Ciclo
38
Coordinatore
Settore disciplinare
Settore concorsuale
Parole chiave
Functional Safety, Fault Tolerance, Reliability, Automotive
Data di discussione
10 Aprile 2026
URI
Gestione del documento: